Building a Loosely Timed SoC Model with OSCI TLM 2.0

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Building a Loosely Timed SoC Model with OSCI TLM 2.0

A Case Study Using an Open Source ISS and Linux 2.6 Kernel

Jeremy Bennett

Embecosm

Application Note 1. Issue 1

June 2008

Copyright © 2008 Embecosm Limited

Creative Commons License

The document entitled " Building a Loosely Timed SoC Model with OSCI TLM 2.0 " by Embecosm is licensed under a Creative Commons Attribution 2.0 UK: England & Wales License. See the Legal Notice for details.

Table of Contents

1. Introduction

1.1. Target Audience
1.2. About the Embecosm TLM 2.0 Application Notes

2. Background to SystemC and the TLM 2.0 Standard

2.1. What is SystemC
2.2. What is a TLM
2.3. Overview of OSCI TLM 2.0

3. Case Study: A Loosely Timed SoC Using TLM 2.0

3.1. The Example Designs
3.2. Example Code

4. Wrapping the ISS

4.1. Modifying the Or1ksim ISS for TLM 2.0
4.2. Or1ksim Wrapper Module Class Definition
4.3. Or1ksim Wrapper Module Class Implementation

5. Testing the Or1ksim ISS TLM 2.0 Wrapper

5.1. Definition of the TLM 2.0 Logger Module
5.2. Implementation of the TLM 2.0 Logger Module
5.3. The Model Main Program
5.4. Test Program to Run on the Or1ksim
5.5. Running the Test

6. Modeling Peripherals

6.1. Details of the 16450 UART
6.2. UART Module Design
6.3. Extending the Or1ksimSC Wrapper Module
6.4. UART: Module Class Definition
6.5. UART Module Class Implementation

7. Adding a Terminal as a Test Bench

7.1. SystemC Terminal Module Design
7.2. Terminal Module Class Definition
7.3. Terminal Module Class Implementation
7.4. The Complete SoC

8. Adding Synchronous Timing to the Model

8.1. Summary of Changes Required for Synchronous Timing
8.2. Extending the Or1ksimExtSC Wrapper Module
8.3. Extending the UartSC Module Class
8.4. Extending the TermSC Module Class
8.5. Main Program for the Synchronous Model
8.6. Compiling and Running the Synchronous Model

9. Adding Temporal Decoupling to the Model

9.1. What is Temporal Decoupling
9.2. Guidelines for Using TLM 2.0 Temporal Decoupling
9.3. Temporal Decoupling the Or1ksim Wrapper Class
9.4. Modifying the UART to Support Temporal Decoupling
9.5. Main Program for Temporal Decoupling
9.6. Compiling and Running the Synchronous Model

10. Modeling Interrupts and Running Linux on the Example SoC

10.1. Extending the Or1ksimDecoupSC Module Class
10.2. Extending the UartDecoupSC Module Class
10.3. Main Program for the Interrupt Driven Model
10.4. Running the Interrupt Driven Model

A. Downloading the Example Models

A.1. Patching Or1ksim
A.2. Building the Linux Kernel

Next

1. Introduction

Copyright © 2008 Embecosm Limited