Integrating the GNU Debugger with Cycle Accurate Models

A Case Study using a Verilator SystemC Model of the OpenRISC 1000

Embecosm Application Note EAN 7
Issue 1, March 2009

This application note demonstrates how to integrate the GNU Debugger with SystemC cycle accurate models. It builds on the techniques described in EAN 5, Using JTAG with SystemC and EAN 6, High Performance SoC Modeling with Verilator.

The result is a GDB Server that makes firmware development and debugging on the cycle accurate model highly productive. Typical uses are:

• Implementation of low level firmware, such as board support packages codecs and specialist device drivers, which rely on exact behavior of SoC peripherals.

• Software optimization of components such as device drivers and codecs, where optimal performance depends on precise integration with the hardware architecture.

• Detailed performance analysis of systems, based on the actual hardware implementation running with its embedded software.

This tutorial uses entirely open source tools. However the same techniques are applicable with commercial tools such as ARC MetaWare and Carbon Design Systems' ModelStudio.

The tutorial demonstrates the techniques using the OpenRISC Reference Platform System-on-Chip (ORPSoC), a 32-bit SoC. Full GDB debugging functionality is provided with a cycle accurate model running at nearly 100kHz.

Embecosm are also able to present the content of this tutorial as a three day seminar. Please contact us for more details.

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This application note is licensed under a Creative Commons Attribution 2.0 License.

The example used in this application note is provided as Embecosm Software Package ESP 6, GNU Debugger Cycle Accurate RSP Server.