Unified SoC Firmware Debugging and Development

There are three key features of Embecosm's unique technology, which provides a standard firmware debugging interface which works equally well with pre-tapeout EDA models or final silicon.

1. The same debugging interface is presented throughout the design life cycle, from initial model to final silicon.
2. The engineer has visibility not just of the processor being debugged, but all the peripherals of the System-on-Chip.
3. The implementation uses existing standard protocols and interfaces.

The tool chain is available both from the command line or within Eclipse. The development and debugging experience is the same throughout the product life cycle, whether the target is a high level architectural transaction level model (TLM), a detailed simulation, an emulation in FPGA or final silicon.

Architecture

Central to the technology is an abstract representation of the physical debug interface in SystemC. For the reference implementation, IEEE 1149.1 JTAG is used, but any hardware interface can be used.

A set of adapters are provided which map down to the physical implementation of this interface. This may be a high level transaction level model in SystemC, an EDA event drive simulator, or the device drivers for a physical cable to a board. Once written these adapters can be used for any target offering the same physical interface, independent of the CPU architecture being debugged. Embecosm supply a set of such adapters suitable for JTAG as part of the reference implementation.

The debug interface is then written to use the abstract representation of the hardware interface. For the reference implementation this is the Remote Serial Protocol used by the GNU Debugger. However it could equally be any other debug interface, for example MetaWare RASCAL. The adapters then ensure that the debugger will work with all the available targets, whether models or physical silicon.

The implementation is easily visualized as a class diagram, in this case showing the generic implementation for GNU Debugger connecting via JTAG.

Implementation of a new architecture only requires subclassing the Remote Serial Protocol server to model target architecture specific behavior in terms of abstract JTAG register transfers. For convenience architecture specific subclasses of the generic JTAG register representation may also be implemented for easy access to architecture specific register fields. Having written this, the debugger will be able to access all the various target implementation types, model or silicon, by reuse of the existing JTAG adapters.

Similarly a new physical interface representation (for example a new JTAG cable) requires only a new subclass of the generic JTAG inteface class. It is then available to all architectures using JTAG.

Reference Implementation

The reference implementation from Embecosm uses a standard 5-pin IEEE 1149 JTAG interface to drive the OpenRISC Reference Platform SoC (ORPSoC).

The abstract JTAG interface is modelled as a SystemC TLM 2.0 transactional interface, using a generic payload with mandatory extension to indicate the exact bitwidth.

JTAG advapters are provided to drive the target modeled as a SystemC TLM 2.0 model, as a cycle accurate SystemC model using Verilator, as an event drive simulation or as an FPGA board with a JTAG cable based on the FTDI 2232C USB to JTAG chip.

The ORPSoC debug unit provides access to the main CPU, to main memory and to key peripheral devices. These are all visible to the debug interface, and hence in the debugger.

The GNU Debugger is used, with interfacing using its standard Remote Serial Protocol (RSP). For RSP, the qCmd packet is used to exchange requests with the target interface. These requests allow the debugger to access not just the processor core, but the state of the peripherals on the chip.

Porting to New Architectures

Embecosm offers a service to port the Unified Debug Interface to other hardware interfaces and other debuggers. It is suitable for any debug interface offering control of the target processor, and any debuggerwhich offers a remote protocol with a sufficiently rich command set.

The Embecosm approach ensures the firmware development team have a consistent and reliable debugging interface from initial system design through to functional silicon.