In the following list, the encoding is shown with the word at the lower address first.
Table 3.5 lists all the 32-bit
ALU instructions, which have class
00xx
;
Table 3.6 lists all the 32-bit
load/store instructions, which have class
01xx
;
Table 3.7 lists all the 32-bit
branch/jump instructions, which have class
10xx
; and
There are no 32-bit instructions in the miscellaneous class, but
if there were, they would have have class
11xx
.
Opcode | Format | Encoding | Description | |||||
---|---|---|---|---|---|---|---|---|
NOP Rd, I
| 14 |
1000000dddiiiiii
| No operation | |||||
0000000dddiiiiii
| ||||||||
ADD Rd, Ra, Rb
| 8 |
1000001dddaaabbb
| Unsigned add | |||||
0000000dddaaabbb
| ||||||||
SUB Rd, Ra, Rb
| 8 |
1000010dddaaabbb
| Unsigned subtract | |||||
0000000dddaaabbb
| ||||||||
AND Rd, Ra, Rb
| 8 |
1000011dddaaabbb
| Bitwise AND | |||||
0000000dddaaabbb
| ||||||||
OR Rd, Ra, Rb
| 8 |
1000100dddaaabbb
| Bitwise OR | |||||
0000000dddaaabbb
| ||||||||
XOR Rd, Ra, Rb
| 8 |
1000101dddaaabbb
| Bitwise exclusive OR | |||||
0000000dddaaabbb
| ||||||||
ASR Rd, Ra, Rb
| 8 |
1000110dddaaabbb
| Arithmetic shift right | |||||
0000000dddaaabbb
| ||||||||
LSL Rd, Ra, Rb
| 8 |
1000111dddaaabbb
| Logical shift left | |||||
0000000dddaaabbb
| ||||||||
LSR Rd, Ra, Rb
| 8 |
1001000dddaaabbb
| Logical shift right | |||||
0000000dddaaabbb
| ||||||||
MOV Rd, Ra
| 8 |
1001001dddaaa000
| Move register to register | |||||
0000000dddaaa000
| ||||||||
ADDI Rd, Ra, I
| 11 |
1001010dddaaaiii
| Unsigned add immediate | |||||
000iiiidddaaaiii
| ||||||||
SUBI Rd, Ra, I
| 11 |
1001011dddaaaiii
| Unsigned subtract immediate | |||||
000iiiidddaaaiii
| ||||||||
ASRI Rd, Ra, I
| 9 |
1001100dddaaaiii
| Arithmetic shift right immediate | |||||
0000000dddaaaiii
| ||||||||
LSLI Rd, Ra, I
| 9 |
1001101dddaaaiii
| Logical shift left immediate | |||||
0000000dddaaaiii
| ||||||||
LSRI Rd, Ra, I
| 9 |
1001110dddaaaiii
| Logical shift right immediate | |||||
0000000dddaaaiii
| ||||||||
MOVI Rd, I
| 15 |
1001111dddiiiiii
| Move immediate to register | |||||
000iiiidddiiiiii
| ||||||||
ADDC Rd, Ra, Rb
| 8 |
1000001dddaaabbb
| Add with carry | |||||
0000001dddaaabbb
| ||||||||
SUBC Rd, Ra, Rb
| 8 |
1000010dddaaabbb
| Subtract with carry | |||||
0000001dddaaabbb
| ||||||||
ANDI Rd, Ra, I
| 10 |
1000011dddaaaiii
| Bitwise AND immediate | |||||
000iii1dddaaaiii
| ||||||||
ORI Rd, Ra, I
| 10 |
1000100dddaaaiii
| Bitwise OR immediate | |||||
000iii1dddaaaiii
| ||||||||
XORI Rd, Ra, I
| 10 |
1000101dddaaaiii
| Bitwise exclusive OR immediate | |||||
000iii1dddaaaiii
|
Table 3.5. 32-bit ALU instructions
Opcode | Format | Encoding | Description | |||||
---|---|---|---|---|---|---|---|---|
LDB Rd, (Ra, S)
| 13 |
1010000dddaaasss
| Indexed load byte | |||||
000ssssdddaaasss
| ||||||||
LDW Rd, (Ra, S)
| 13 |
1010100dddaaasss
| Indexed load word | |||||
000ssssdddaaasss
| ||||||||
LDB Rd, (Ra+ , S)
| 13 |
1010001dddaaasss
| Indexed load byte with postincrement | |||||
000ssssdddaaasss
| ||||||||
LDW Rd, (Ra+ , S)
| 13 |
1010101dddaaasss
| Indexed load word with postincrement | |||||
000ssssdddaaasss
| ||||||||
LDB Rd, (- Ra, S)
| 13 |
1010010dddaaasss
| Indexed load byte with predecrement | |||||
000ssssdddaaasss
| ||||||||
LDW Rd, (- Ra, S)
| 13 |
1010110dddaaasss
| Indexed load word with predecrement | |||||
000ssssdddaaasss
| ||||||||
STB (Rd, S) , Ra
| 13 |
1011000dddaaasss
| Indexed store byte | |||||
000ssssdddaaasss
| ||||||||
STW (Rd, S) , Ra
| 13 |
1011100dddaaasss
| Indexed store word | |||||
000ssssdddaaasss
| ||||||||
STB (Rd+ , S) , Ra
| 13 |
1011001dddaaasss
| Indexed store byte with postincrement | |||||
000ssssdddaaasss
| ||||||||
STW (Rd+ , S) , Ra
| 13 |
1011101dddaaasss
| Indexed store word with postincrement | |||||
000ssssdddaaasss
| ||||||||
STB (- Rd, S) , Ra
| 13 |
1011010dddaaasss
| Indexed store byte with predecrement | |||||
000ssssdddaaasss
| ||||||||
STW (- Rd, S) , Ra
| 13 |
1011111dddaaasss
| Indexed store word with predecrement | |||||
000ssssdddaaasss
|
Table 3.6. 32-bit load/store instructions
Opcode | Format | Encoding | Description | |||||
---|---|---|---|---|---|---|---|---|
BRA S
| 17 |
1100000sssssssss
| Relative branch | |||||
000sssssssssssss
| ||||||||
BAL S, Rb
| 16 |
1100001ssssssbbb
| Relative branch and link | |||||
000ssssssssssbbb
| ||||||||
BEQ S, Ra, Rb
| 12 |
1100010sssaaabbb
| Relative branch if equal | |||||
000sssssssaaabbb
| ||||||||
BNE S, Ra, Rb
| 12 |
1100011sssaaabbb
| Relative branch if not equal | |||||
000sssssssaaabbb
| ||||||||
BLTS S, Ra, Rb
| 12 |
1100100sssaaabbb
| Relative branch if signed less than | |||||
000sssssssaaabbb
| ||||||||
BGTS S, Ra, Rb
| 12 |
1100101sssaaabbb
| Relative branch if signed greater than | |||||
000sssssssaaabbb
| ||||||||
BLTU S, Ra, Rb
| 12 |
1100110sssaaabbb
| Relative branch if unsigned less than | |||||
000sssssssaaabbb
| ||||||||
BGTU S, Ra, Rb
| 12 |
1100111sssaaabbb
| Relative branch if unsigned greater than | |||||
000sssssssaaabbb
| ||||||||
JMP Rd
| 8 |
1101000ddd000000
| Absolute jump | |||||
0000000ddd000000
| ||||||||
JAL Rd, Rb
| 8 |
1101001ddd000bbb
| Absolute jump and link | |||||
0000000ddd000bbb
| ||||||||
JEQ Rd, Ra, Rb
| 8 |
1101010dddaaabbb
| Absolute jump if equal | |||||
0000000dddaaabbb
| ||||||||
JNE Rd, Ra, Rb
| 8 |
1101011dddaaabbb
| Absolute jump if not equal | |||||
0000000dddaaabbb
| ||||||||
JLTS Rd, Ra, Rb
| 8 |
1101100dddaaabbb
| Absolute jump if signed less than | |||||
0000000dddaaabbb
| ||||||||
JGTS Rd, Ra, Rb
| 8 |
1101101dddaaabbb
| Absolute jump if signed greater than | |||||
0000000dddaaabbb
| ||||||||
JLTU Rd, Ra, Rb
| 8 |
1101110dddaaabbb
| Absolute jump if unsigned less than | |||||
0000000dddaaabbb
| ||||||||
JGTU Rd, Ra, Rb
| 8 |
1101111dddaaabbb
| Absolute jump if unsigned greater than | |||||
0000000dddaaabbb
| ||||||||
JMPL Rd
| 8 |
1101000ddd000000
| Absolute jump long | |||||
0000001ddd000000
| ||||||||
JALL Rd, Rb
| 8 |
1101001ddd000bbb
| Absolute jump long and link | |||||
0000001ddd000bbb
| ||||||||
JEQL Rd, Ra, Rb
| 8 |
1101010dddaaabbb
| Absolute jump long if equal | |||||
0000001dddaaabbb
| ||||||||
JNEL Rd, Ra, Rb
| 8 |
1101011dddaaabbb
| Absolute jump long if not equal | |||||
0000001dddaaabbb
| ||||||||
JLTSL Rd, Ra, Rb
| 8 |
1101100dddaaabbb
| Absolute jump long if signed less than | |||||
0000001dddaaabbb
| ||||||||
JGTSL Rd, Ra, Rb
| 8 |
1101101dddaaabbb
| Absolute jump long if signed greater than | |||||
0000001dddaaabbb
| ||||||||
JLTUL Rd, Ra, Rb
| 8 |
1101110dddaaabbb
| Absolute jump long if unsigned less than | |||||
0000001dddaaabbb
| ||||||||
JGTUL Rd, Ra, Rb
| 8 |
1101111dddaaabbb
| Absolute jump if unsigned greater than | |||||
0000001dddaaabbb
|
Table 3.7. 32-bit branch/jump instructions