The c packet is processed by
rsp_continue ()
. Any address from which to
continue is broken out from the packet using
sscanf ()
. If no address is given,
execution continues from the current program counter (in
cpu_state.pc
).
The continue functionality is provided by the function
rsp_continue_generic ()
which takes an
address and an Or1ksim exception as arguments, allowing it to be
shared with the processing of the C packet
(continue with signal) in the future. For the c
packet, EXCEPT_NONE
is used.
rsp_continue_generic ()
at present ignores
its exception argument (the C packet is not
supported). It sets the program counter to the address supplied
using set_npc ()
(see Section 4.6.5).
The control registers of the debug unit must then be set appropriately. The Debug Reason Register and watchpoint generation flags in Debug Mode Register 2 are cleared. The Debug Stop Register is set to trigger on TRAP exceptions (so memory breakpoints are picked up), and the single step flag is cleared in Debug Mode Register 1.
cpu_state.sprs[SPR_DRR] = 0; cpu_state.sprs[SPR_DMR2] &= ~SPR_DMR2_WGB; cpu_state.sprs[SPR_DMR1] &= ~SPR_DMR1_ST; cpu_state.sprs[SPR_DSR] |= SPR_DSR_TE;
The processor is then unstalled
(set_stall_state (0)
) and the client
waiting flag (rsp.client_waiting
) set. This
latter means that when handle_rsp ()
is
next entered, it will know that a reply is outstanding, and return
the appropriate stop packet required when the processor stalls after
a continue or step command.