8.1. Summary of Changes Required for Synchronous Timing

Each module of the existing SoC requires some changes. New classes, Or1ksimSyncSC, UartSyncSC and TermSyncSC are derived from the existing classes to provide added functionality. In addition the underlying Or1ksim ISS library will need extending. The main program will need modifying to use these new classes.

Or1ksimSyncSC. A public function to report the clock rate of the underlying Or1ksim ISS is added (requiring an extension to the Or1ksim library), and the transport function, doTrans modified to add timing information.
UartSyncSC. This now models the time taken to put a character out on the Tx wire, so must know its input clock rate (in this SoC, the Or1ksim clock rate), so that baud rate can be calculated from the divisor latch. Also models the true time to process a read or write on the bus and returns this with the transaction response.
TermSyncSC. This now models the time taken to put a character out to the UART, so must know its baud rate. This requires an updated thread listening to the xterm, so that the baud rate delay can be added.
Or1ksim ISS library. Information functions are added to return the model clock rate (used as input clock rate for the UART) and to determine the time spent executing instructions (so Or1ksimSyncSC can determine the synchronization time with SystemC).
A new main program syncSocMainSC.cpp to build the new classes into a synchronized SoC. Information functions are added to return the model clock rate (used as input clock rate for the UART) and the time spent executing instructions (so Or1ksimSyncSC can determine the synchronization time with SystemC.