The new module class, Or1ksimIntrSC is derived from the existing Or1ksimIntrSC module class, whose header, Or1ksimIntrSC.h, is included.

The key addition to the public interface is a 1-bit wide TLM 2.0 target port for JTAG transactions.

tlm_utils::simple_target_socket&Or1ksimJtagSC, 1&  jtag;
	  

The constructor is identical in form to that of the base class, taking the same arguments. It will have more work to do, setting up the target TLM 2.0 port handler and clearing the mutex.

The protected virtual run method is reimplemented in this class. Functionally it is very similar to the base implementation, but a SystemC mutex is used to ensure that it does not run while a JTAG transaction is being processed.

As described earlier (see Section 11.2), the JTAG transactional interface uses an ignorable payload extension. If this extension is not present, the address field of the generic payload is used to infer the action required. For convenience the addresses corresponding to the instruction and data registers are specified.

static const unsigned int  ADDR_SHIFT_IR = 0;
static const unsigned int  ADDR_SHIFT_DR = 1;
	  

JTAG transactions cannot be processed while the underlying Or1ksim ISS is running. This is enforced using a SystemC mutex.

sc_core::sc_mutex  or1ksimMutex;
	  

Finally we need a handler for JTAG transactions that are received.

void  jtagHandler( tlm::tlm_generic_payload &payload,
                   sc_core::sc_time         &delay );
	  

The definition of the Or1ksim ISS wrapper module class with JTAG debug support, Or1ksimJtagSC may be found in sys-models/jtag-soc/Or1ksimJtagSC.h in the distribution.