A software debugger typically interacts with a processor via an independent debugging interface. For the OpenRISC 1000 the debug interface uses IEEE 1149.1 JTAG. To allow the debugger to connect to the model we must model this interface. This design is shown in Figure 3.4.

Figure 3.4.  Simple SoC based on the OpenRISC 1000 Or1ksim with separate JTAG interface.