5.6.3. Running the Compiled Model

The compiled program can be executed by passing in as arguments the Or1ksim configuration file and the OpenRISC 1000 binary. The result is shown in Figure 5.3.

$ ./sysc-models/logger/logger ../simple.cfg progs-or32/logger-test

             SystemC 2.2.0 --- May 16 2008 10:30:46
        Copyright (c) 1996-2006 by all Contributors
                    ALL RIGHTS RESERVED

   ... <Or1ksim initialization messages>

Writing byte 0xa5 to address 0x090000000
Logging
  Command:      Write
  Address:      0x90000000
  Byte enables: 0x000000ff
  Data:         0x003f54a5

Writing half word 0xbeef to address 0x090000002
Logging
  Command:      Write
  Address:      0x90000000
  Byte enables: 0xffff0000
  Data:         0xefbe8fc4

   ... <More test program output>

Read half word 0x0FFFF from address 0x090000002
Logging
  Command:      Read
  Address:      0x90000004
  Byte enables: 0xffffffff

Read full word 0x028372F09 from address 0x090000004
exit(0)
@reset : cycles 0, insn #0
@exit  : cycles 33297, insn #16581
 diff  : cycles 33297, insn #16581
$

Figure 5.3. Output from the logger test of the Or1ksim wrapper module.

Each access from the application program generates the expected transactional access. All accesses are 32 bits wide, but for byte and half-word access the relevant bytes are masked off. The reads return meaningless values (the logger was not designed to package a return value), but in each case the value returned fits in the size requested as expected.

	Note
The Or1ksim ISS can be configured to model little-endian architectures. The TLM 2.0 payloads are always packed with data using the endianness of the model. If the exercise were repeated with a little-endian version of Or1ksim the addresses of the access would be unchanged (they are word aligned), but the byte enable masks for the byte and half word accesses would be inverted.

Note

The Or1ksim ISS can be configured to model little-endian architectures. The TLM 2.0 payloads are always packed with data using the endianness of the model.

If the exercise were repeated with a little-endian version of Or1ksim the addresses of the access would be unchanged (they are word aligned), but the byte enable masks for the byte and half word accesses would be inverted.