Chapter 6. Modeling Peripherals

6.1. Details of the 16450 UART

6.2. UART Module Design

6.2.1. UART Model Interfaces
6.2.2. UART Model Registers
6.2.3. UART Model Interrupts

6.3. Extending the Or1ksimSC Wrapper Module

6.3.1. Adding an Endianness Test Function to the Or1ksim Library
6.3.2. Extended Or1ksim Wrapper Module Class Definition
6.3.3. Extended Or1ksim Wrapper Module Class Implementation

6.4. UART: Module Class Definition

6.4.1. Headers and Constant Definitions
6.4.2. Class Declaration and Constructor
6.4.3. Public Interface
6.4.4. SystemC Processes
6.4.5. Blocking Transport Callback
6.4.6. Utility Functions
6.4.7. UART State
6.4.8. Notifying the Bus Thread of Transaction Activity

6.5. UART Module Class Implementation

6.5.1. UART Constructor
6.5.2. UART Processes
6.5.3. UART Blocking Transport Callback
6.5.4. UART Read Behavior
6.5.5. UART Write Behavior
6.5.6. UART Utility Functions

This example uses a single peripheral, a UART. The UART model is based on National Semiconductor 16450 design. The Or1ksim ISS wrapper must be extended to work with this UART.

The code for the UART module (UartSC.cpp and UartSC.h) may be found with the extended Or1ksim wrapper code (Or1ksimExtSC.cpp and Or1ksimExtSC.h) in the sysc-models/simple-soc directory of the distribution.