7.5.4. Model Timing

This model is completely untimed. It executes the behavior of the design, and for that reason such models are useful in system verification.

The next stages will add timing to this model. To allow this to be demonstrated, add some logging to the UART and terminal to report the timing of reads and writes.

Edit the rxMethod in UartSC, to print out the time when a character is received from the terminal.

void
UartSC::rxMethod()
{
  regs.rbr  = rx.read();

  sc_core::sc_time  now = sc_core::sc_time_stamp();
  cout << "Char " << (char)(regs.rbr) << " read at  " << sc_time_stamp ()
       << endl;

  set( regs.lsr, UART_LSR_DR );         // Mark data ready
  genIntr( UART_IER_RBFI );             // Interrupt if enabled

}       // rxMethod()

Similarly edit the rxMethod function in TermSC, to print out the time when a character is received from the UART.

void
TermSC::rxMethod()
{
  xtermWrite( rx.read() );		// Write it to the screen

  cout << "Char written at " << sc_time_stamp() << endl;

}	// rxMethod()

In both cases the C++ iostream header will be needed at the top of the file (UartSC.cpp and TermSC.cpp), and the entities used will need to be brought into the local namespace.

#include <iostream>


using sc_core::sc_time_stamp;

using std::cout;
using std::endl;

Note

	Note
For convenience these changes are already made in the files in the distribution, but the two `cout` invocations are commented out. All that is needed is to remove the commenting. Once removed, the commenting should stay removed for all the future examples, since they all need to show timing details.

For convenience these changes are already made in the files in the distribution, but the two cout invocations are commented out. All that is needed is to remove the commenting.

Once removed, the commenting should stay removed for all the future examples, since they all need to show timing details.

The model can now be rerun as before, and will print out precise timing. The output is shown in Figure 7.6.

	    $ ./build/sysc-models/simple-soc simple.cfg progs_or32/uart-loop

             SystemC 2.2.0 --- May 16 2008 10:30:46
        Copyright (c) 1996-2006 by all Contributors
                    ALL RIGHTS RESERVED

   ... <Or1ksim initialization messages>

Char read at    0 s
Read: 'F'
Char written at 0 s
Char read at    0 s
Read: 'a'
Char written at 0 s
Char read at    0 s
Read: 'r'

   ... <Lots more output>

Figure 7.6. UART loop back program log output with timing annotation.

As can be seen all the reads and writes occur at time zero.