 | Services and Modeling for Embedded Software Development |
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| Services and Modeling for Embedded Software Development |
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Table 3.1 lists all the 16-bit
ALU instructions, which have class
00;
Table 3.2 lists all the 16-bit
load/store instructions, which have class 01;
Table 3.3 lists all the 16-bit
branch/jump instructions, which have class
10; and
Table 3.4 lists all the 16-bit
miscellaneous instructions, which have class
11.
| Opcode | Format | Encoding | Description | |||||
|---|---|---|---|---|---|---|---|---|
NOP Rd,I
| 5 |
0000000dddiiiiii
| No operation | |||||
ADD Rd,Ra,Rb
| 1 |
0000001dddaaabbb
| Unsigned add | |||||
SUB Rd,Ra,Rb
| 1 |
0000010dddaaabbb
| Unsigned subtract | |||||
AND Rd,Ra,Rb
| 1 |
0000011dddaaabbb
| Bitwise AND | |||||
OR Rd,Ra,Rb
| 1 |
0000100dddaaabbb
| Bitwise OR | |||||
XOR Rd,Ra,Rb
| 1 |
0000101dddaaabbb
| Bitwise exclusive OR | |||||
ASR Rd,Ra,Rb
| 1 |
0000110dddaaabbb
| Arithmetic shift right | |||||
LSL Rd,Ra,Rb
| 1 |
0000111dddaaabbb
| Logical shift left | |||||
LSR Rd,Ra,Rb
| 1 |
0001000dddaaabbb
| Logical shift right | |||||
MOV Rd,Ra
| 1 |
0001001dddaaa000
| Move register to register | |||||
ADDI Rd,Ra,#I
| 2 |
0001010dddaaaiii
| Unsigned add immediate | |||||
SUBI Rd,Ra,#I
| 2 |
0001011dddaaaiii
| Unsigned subtract immediate | |||||
ASRI Rd,Ra,#I
| 2 |
0001100dddaaaiii
| Arithmetic shift right immediate | |||||
LSLI Rd,Ra,#I
| 2 |
0001101dddaaaiii
| Logical shift left immediate | |||||
LSRI Rd,Ra,#I
| 2 |
0001110dddaaaiii
| Logical shift right immediate | |||||
MOVI Rd,#I
| 5 |
0001111dddiiiiii
| Move immediate to register | |||||
Table 3.1. 16-bit ALU instructions
| Opcode | Format | Encoding | Description | |||||
|---|---|---|---|---|---|---|---|---|
LDB Rd,(Ra,S)
| 4 |
0010000dddaaasss
| Indexed load byte | |||||
LDW Rd,(Ra,S)
| 4 |
0010100dddaaasss
| Indexed load word | |||||
LDB Rd,(Ra+,S)
| 4 |
0010001dddaaasss
| Indexed load byte with postincrement | |||||
LDW Rd,(Ra+,S)
| 4 |
0010101dddaaasss
| Indexed load word with postincrement | |||||
LDB Rd,(-Ra,S)
| 4 |
0010010dddaaasss
| Indexed load byte with predecrement | |||||
LDW Rd,(-Ra,S)
| 4 |
0010110dddaaasss
| Indexed load word with predecrement | |||||
STB (Rd,S),Ra
| 4 |
0011000dddaaasss
| Indexed store byte | |||||
STW (Rd,S),Ra
| 4 |
0011100dddaaasss
| Indexed store word | |||||
STB (Rd+,S),Ra
| 4 |
0011001dddaaasss
| Indexed store byte with postincrement | |||||
STW (Rd+,S),Ra
| 4 |
0011101dddaaasss
| Indexed store word with postincrement | |||||
STB (-Rd,S),Ra
| 4 |
0011010dddaaasss
| Indexed store byte with predecrement | |||||
STW (-Rd,S),Ra
| 4 |
0011110dddaaasss
| Indexed store word with predecrement | |||||
Table 3.2. 16-bit load/store instructions
| Opcode | Format | Encoding | Description | |||||
|---|---|---|---|---|---|---|---|---|
BRA S
| 7 |
0100000sssssssss
| Relative branch | |||||
BAL S,Rb
| 6 |
0100001ssssssbbb
| Relative branch and link | |||||
BEQ S,Ra,Rb
| 3 |
0100010sssaaabbb
| Relative branch if equal | |||||
BNE S,Ra,Rb
| 3 |
0100011sssaaabbb
| Relative branch if not equal | |||||
BLTS S,Ra,Rb
| 3 |
0100100sssaaabbb
| Relative branch if signed less than | |||||
BGTS S,Ra,Rb
| 3 |
0100101sssaaabbb
| Relative branch if signed greater than | |||||
BLTU S,Ra,Rb
| 3 |
0100110sssaaabbb
| Relative branch if unsigned less than | |||||
BGTU S,Ra,Rb
| 3 |
0100111sssaaabbb
| Relative branch if unsigned greater than | |||||
JMP Rd
| 1 |
0101000ddd000000
| Absolute jump | |||||
JAL Rd,Rb
| 1 |
0101001ddd000bbb
| Absolute jump and link | |||||
JEQ Rd,Ra,Rb
| 1 |
0101010dddaaabbb
| Absolute jump if equal | |||||
JNE Rd,Ra,Rb
| 1 |
0101011dddaaabbb
| Absolute jump if not equal | |||||
JLTS Rd,Ra,Rb
| 1 |
0101100dddaaabbb
| Absolute jump if signed less than | |||||
JGTS Rd,Ra,Rb
| 1 |
0101101dddaaabbb
| Absolute jump if signed greater than | |||||
JLTU Rd,Ra,Rb
| 1 |
0101110dddaaabbb
| Absolute jump if unsigned less than | |||||
JGTU Rd,Ra,Rb
| 1 |
0101111dddaaabbb
| Absolute jump if unsigned greater than | |||||
Table 3.3. 16-bit branch/jump instructions
| Opcode | Format | Encoding | Description | |||||
|---|---|---|---|---|---|---|---|---|
RTE Rd
| 1 |
0110000ddd000000
| Return from exception | |||||
Table 3.4. Miscellaneous 16-bit instructions
| |  | |
| 3.3. Summary of Instructions |  | 3.3.2. 32-bit Instructions of AAP |