Services and Modeling for Embedded Software Development
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Chapter 10.  Modeling Interrupts and Running Linux on the Example SoC

10.1. Overall Design of the SoC Model with Interrupts
10.1.1. Class Structure
10.1.2. Behavioral Diagrams
10.2. Extending the Or1ksimDecoupSC Module Class
10.2.1. Adding Interrupt Generation Functions to the Or1ksim Library
10.2.2. Or1ksimIntrSC Module Class Definition
10.2.3. Or1ksimIntrSC Module Class Implementation
10.3. Extending the UartDecoupSC Module Class
10.3.1. UartIntrSC Module Class Definition
10.3.2. UartIntrSC Module Class Implementation
10.4. Main Program for the Interrupt Driven Model
10.5. Running the Interrupt Driven Model
10.5.1. Simple Test for the Interrupt Driven SoC Model
10.5.2. Running Linux

The Simple SoC used in the previous sections is not sufficient to run Linux. Two significant extensions are needed.

The example design was shown in Section 3.1.3, but for convenience the diagram is repeated here in Figure 10.1.

Simple SoC based on the OpenRISC 1000 Or1ksim with interrupts and MMU.

Figure 10.1.  Simple SoC based on the OpenRISC 1000 Or1ksim with interrupts and MMU.


Enabling memory management is a matter of modifying the configuration file for Or1ksim. The Linux port used here expects to boot from flash memory, so the internal memory of Or1ksim is also extended to provide this.

The UART model, UartDecoupSC is further extended by a new derived class, UartIntrSC providing a SystemC sc_out<bool> port through which the interrupt signal is driven.

The code for the Or1ksim ISS wrapper with interrupts enabled (Or1ksimIntrSC.cpp and Or1ksimIntrSC.h), the code for the interrupt enabled UART module (UartIntrSC.cpp and UartIntrSC.h) and the main program for the complete model (intrSocMainSC.cpp) may be found in the sysc-models/intr-soc directory of the distribution.

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