Tag: OSHUG

A dive into RI5CY core internals

What is RI5CY? RI5CY is a 4-stage in-order pipelined RISC-V core written in SystemVerilog. It has become very popular for many applications, including being adopted as the first Core-V core in the OpenHW Group family, as… Read More

RSA FutureMaker

The Royal Society of Arts, Manufactures and Commerce, together with the Comino Foundation, are hosting a day-long interactive showcase and celebration of making at London's historic Somerset House on Wednesday 19th June. Dr Jeremy Bennett will be giving a talk at midday, entitled Open Source Hardware: How freely available designs drive education, innovation and industrial progress. Read More